In the integrated circuit industry, the formation of contacts and interconnects from one layer of conductive material to another layer of conductive material is required. As integrated circuit surface densities increase, the area in which contacts and interconnections may be made decreases. In addition, yield reduction, increases in capacitive coupling, and electrical short circuit problems tend to occur via contacts in dense integrated circuits.
In many cases, integrated circuits contain four or more conductive layers which overlie the substrate. The conductive layers are used for electrical routing of integrated circuit devices and device formation. In some cases, it is necessary to connect a top conductive layer (i.e. a fourth or a fifth conductive layer) to a lower conductive layer (i.e. a first, a second conductive layer, or a diffusion). These contacts or interconnects are difficult to form if the intermediate layers (i.e. a third conductive layer) are positioned in close proximity to where the contact or interconnect is to be formed.
In one conventional form, if electrical contact is to be made between, for example, the fourth conductive layer and the first conductive layer, the fourth conductive layer is electrically connected to the third conductive layer, the third layer is electrically connected to the second layer, and the second conductive layer is electrically connected to the first conductive layer to complete the electrical contact. This contact methodology requires multiple non-self-aligned alignments, precise alignment tolerances, the use of several conductors in a redundant manner to form a single contact, a larger surface area, and in general this method is not applicable to dense integrated circuit designs.
In order to form a contact, for example, from the conductive layer three to conductive layer one, conductive layer two may be laid out within certain predetermined distances or separations from the contact region. Therefore, conductive layer three connects directly to conductive layer one without the use of conductive layer two. Disadvantages to this approach include the fact that the above-mentioned predetermined distances are lithographic tolerance defined and therefore relatively large, the contact is not self aligned, a total surface area of the integrated circuit is increased, and the layout of conductive layer two is restricted and may be functionally impaired.
Another method is used in order to reduce limitations to the intermediate conductive layers and to improve alignment. For example, a diffusion is formed within the substrate and a first conductive layer is formed over the diffusion. A contact hole is etched through the first conductive layer forming a first conductive layer sidewall and exposes a surface of the diffusion. A sidewall spacer is used to isolate the first conductive layer sidewall within the opening. A second conductive layer is deposited to connect the second conductive layer to the diffusion while the first conductive layer remains isolated by the spacer.
One problem with this approach is in order for spacers to form, a near perfect vertical contact sidewall profile is required. Either very thin spacers (less than a few hundred angstroms thick) or no spacers form adjacent contact sidewalls which have profiles at an angle other than near vertical. For example, if a contact hole is formed wherein the contact hole has a sidewall that is angled at a sixty to eighty degree angle or less, the spacer may not properly form and the first conductive layer may be inadvertently electrically short circuited to the contact. Therefore, the above mentioned spacer method results in a reduced process window, reduced yield, increased capacitive coupling (due to the thin dielectric spacer between the contact and the first conductive layer), and reduced lifetime reliability.
SUMMARY OF THE INVENTION
The previously mentioned disadvantages are overcome and other advantages achieved with the present invention. In one form, the present invention comprises an interconnection structure and method of formation. A first conductive layer is formed. A first dielectric layer is formed overlying the first conductive layer, and a second conductive layer is formed overlying the first dielectric layer. A second dielectric layer is formed overlying the second conductive layer An opening is formed through the second dielectric layer, the second conductive layer, and the first dielectric layer. The opening exposes a portion of the first conductive layer, and forms a sidewall of the second conductive layer. The sidewall of the second conductive layer is laterally recessed to form a recessed sidewall of the second conductive layer. A sidewall dielectric is formed adjacent the recessed sidewall of the second conductive layer. A third conductive layer is formed within the opening. The third conductive layer forms electric contact to the first conductive layer.
The present invention will be more clearly understood from the detailed description below in conjunction with the accompanying drawings.